Vector Extensions - D Programming Language
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# Vector Extensions

Contents

1. core.simd
   1. Properties
   2. Conversions
   3. Accessing Individual Vector Elements
   4. Conditional Compilation
2. X86 And X86_64 Vector Extension Implementation
   1. Vector Operation Intrinsics

Modern CPUs often support specialized vector types and vector operations, sometimes called "media instructions". Vector types are a fixed array of floating or integer types, and vector operations operate simultaneously on them, thus achieving great speed-ups.

When the compiler takes advantage of these instructions with standard D code to speed up loops over arithmetic data, this is called auto-vectorization. Auto-vectorization, however, has had only limited success and has not been able to really take advantage of the richness (and often quirkiness) of the native vector instructions.

D has the array operation notation, such as:

    int[] a,b;
    ...
    a[] += b[];

which can be vectorized by the compiler, but again success is limited for the same reason auto-vectorization is.

The difficulties with trying to use vector instructions on regular arrays are:

1. The vector types have stringent alignment requirements that are not and cannot be met by conventional arrays.
2. C ABI's often have vector extensions and have special name mangling for them, call/return conventions, and symbolic debug support.
3. The only way to get at the full vector instruction set would be to use inline assembler - but the compiler cannot do register allocation across inline assembler blocks (or other optimizations), leading to poor code performance.
4. Interleaving conventional array code with vector operations on the same data can unwittingly lead to extremely poor runtime performance.

These issues are cleared up by using special vector types.

## core.simd

Vector types and operations are introduced to D code by importing core.simd:

    import core.simd;

These types and operations will be the ones defined for the architecture the compiler is targeting. If a particular CPU family has varying support for vector types, an additional runtime check may be necessary. The compiler does not emit runtime checks; those must be done by the programmer.

Depending on the architecture, compiler flags may be required to activate support for SIMD types.

The types defined will all follow the naming convention:

    typeNN

where type is the vector element type and NN is the number of those elements in the vector type. The type names will not be keywords.

### Properties

Vector types have the property:

Vector Type Properties
Property | Description
--- | ---
.array | Returns static array representation

All the properties of the static array representation also work.

### Conversions

Vector types of the same size can be implicitly converted among each other. Vector types can be cast to the static array representation.

Integers and floating point values can be implicitly converted to their vector equivalents:

    int4 v = 7;
    v = 3 + v;   // add 3 to each element in v

### Accessing Individual Vector Elements

They cannot be accessed directly, but can be when converted to an array type:

    int4 v;
    (cast(int*)&v)[3] = 2;   // set 3rd element of the 4 int vector
    (cast(int[4])v)[3] = 2;  // set 3rd element of the 4 int vector
    v.array[3] = 2;          // set 3rd element of the 4 int vector
    v.ptr[3] = 2;            // set 3rd element of the 4 int vector

### Conditional Compilation

If vector extensions are implemented, the version identifier D_SIMD is set.

Whether a type exists or not can be tested at compile time with an IsExpression:

    static if (is(typeNN))
        ... yes, it is supported ...
    else
        ... nope, use workaround ...

Whether a particular operation on a type is supported can be tested at compile time with:

    float4 a,b;
    static if (__traits(compiles, a+b))
        ... yes, it is supported ...
    else
        ... nope, use workaround ...

For runtime testing to see if certain vector instructions are available, see the functions in core.cpuid.

A typical workaround would be to use array vector operations instead:

    float4 a,b;
    static if (__traits(compiles, a/b))
        c = a / b;
    else
        c[] = a[] / b[];

## X86 And X86_64 Vector Extension Implementation

The rest of this document describes the specific implementation of the vector types for the X86 and X86_64 architectures.

The vector extensions are currently implemented for the OS X 32 bit target, and all 64 bit targets.

core.simd defines the following types:

Vector Types
Type Name | Description | gcc Equivalent
--- | --- | ---
void16 | 16 bytes of untyped data | no equivalent
byte16 | 16 byte's | signed char __attribute__((vector_size(16)))
ubyte16 | 16 ubyte's | unsigned char __attribute__((vector_size(16)))
short8 | 8 short's | short __attribute__((vector_size(16)))
ushort8 | 8 ushort's | ushort __attribute__((vector_size(16)))
int4 | 4 int's | int __attribute__((vector_size(16)))
uint4 | 4 uint's | unsigned __attribute__((vector_size(16)))
long2 | 2 long's | long __attribute__((vector_size(16)))
ulong2 | 2 ulong's | unsigned long __attribute__((vector_size(16)))
float4 | 4 float's | float __attribute__((vector_size(16)))
double2 | 2 double's | double __attribute__((vector_size(16)))
void32 | 32 bytes of untyped data | no equivalent
byte32 | 32 byte's | signed char __attribute__((vector_size(32)))
ubyte32 | 32 ubyte's | unsigned char __attribute__((vector_size(32)))
short16 | 16 short's | short __attribute__((vector_size(32)))
ushort16 | 16 ushort's | ushort __attribute__((vector_size(32)))
int8 | 8 int's | int __attribute__((vector_size(32)))
uint8 | 8 uint's | unsigned __attribute__((vector_size(32)))
long4 | 4 long's | long __attribute__((vector_size(32)))
ulong4 | 4 ulong's | unsigned long __attribute__((vector_size(32)))
float8 | 8 float's | float __attribute__((vector_size(32)))
double4 | 4 double's | double __attribute__((vector_size(32)))

Note: for 32 bit gcc, it's long long instead of long.

Supported 128-bit Vector Operators
Operator | void16 | byte16 | ubyte16 | short8 | ushort8 | int4 | uint4 | long2 | ulong2 | float4 | double2
--- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | ---
= | × | × | × | × | × | × | × | × | × | × | ×
+ | – | × | × | × | × | × | × | × | × | × | ×
- | – | × | × | × | × | × | × | × | × | × | ×
* | – | – | – | × | × | – | – | – | – | × | ×
/ | – | – | – | – | – | – | – | – | – | × | ×
& | – | × | × | × | × | × | × | × | × | – | –
| | – | × | × | × | × | × | × | × | × | – | –
^ | – | × | × | × | × | × | × | × | × | – | –
+= | – | × | × | × | × | × | × | × | × | × | ×
-= | – | × | × | × | × | × | × | × | × | × | ×
*= | – | – | – | × | × | – | – | – | – | × | ×
/= | – | – | – | – | – | – | – | – | – | × | ×
&= | – | × | × | × | × | × | × | × | × | – | –
|= | – | × | × | × | × | × | × | × | × | – | –
^= | – | × | × | × | × | × | × | × | × | – | –
unary~ | – | × | × | × | × | × | × | × | × | – | –
unary+ | – | × | × | × | × | × | × | × | × | × | ×
unary- | – | × | × | × | × | × | × | × | × | × | ×

Supported 256-bit Vector Operators
Operator | void32 | byte32 | ubyte32 | short16 | ushort16 | int8 | uint8 | long4 | ulong4 | float8 | double4
--- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | ---
= | × | × | × | × | × | × | × | × | × | × | ×
+ | – | × | × | × | × | × | × | × | × | × | ×
- | – | × | × | × | × | × | × | × | × | × | ×
* | – | – | – | – | – | – | – | – | – | × | ×
/ | – | – | – | – | – | – | – | – | – | × | ×
& | – | × | × | × | × | × | × | × | × | – | –
| | – | × | × | × | × | × | × | × | × | – | –
^ | – | × | × | × | × | × | × | × | × | – | –
+= | – | × | × | × | × | × | × | × | × | × | ×
-= | – | × | × | × | × | × | × | × | × | × | ×
*= | – | – | – | – | – | – | – | – | – | × | ×
/= | – | – | – | – | – | – | – | – | – | × | ×
&= | – | × | × | × | × | × | × | × | × | – | –
|= | – | × | × | × | × | × | × | × | × | – | –
^= | – | × | × | × | × | × | × | × | × | – | –
unary~ | – | × | × | × | × | × | × | × | × | – | –
unary+ | – | × | × | × | × | × | × | × | × | × | ×
unary- | – | × | × | × | × | × | × | × | × | × | ×

Operators not listed are not supported at all.

### Vector Operation Intrinsics

See core.simd for the supported intrinsics.

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