# core.simd

Builtin SIMD intrinsics
Source:
License:
Boost License 1.0.
Authors:
,

template Vector(T)
  Create a vector type.
  Parameters:
  T = one of double[2], float[4], void[16], byte[16], ubyte[16], short[8], ushort[8], int[4], uint[4], long[2], ulong[2]. For 256 bit vectors, one of double[4], float[8], void[32], byte[32], ubyte[32], short[16], ushort[16], int[8], uint[8], long[4], ulong[4]
alias void16 = __vector(void[16]);
alias double2 = __vector(double[2]);
alias float4 = __vector(float[4]);
alias byte16 = __vector(byte[16]);
alias ubyte16 = __vector(ubyte[16]);
alias short8 = __vector(short[8]);
alias ushort8 = __vector(ushort[8]);
alias int4 = __vector(int[4]);
alias uint4 = __vector(uint[4]);
alias long2 = __vector(long[2]);
alias ulong2 = __vector(ulong[2]);
alias void32 = __vector(void[32]);
alias double4 = __vector(double[4]);
alias float8 = __vector(float[8]);
alias byte32 = __vector(byte[32]);
alias ubyte32 = __vector(ubyte[32]);
alias short16 = __vector(short[16]);
alias ushort16 = __vector(ushort[16]);
alias int8 = __vector(int[8]);
alias uint8 = __vector(uint[8]);
alias long4 = __vector(long[4]);
alias ulong4 = __vector(ulong[4]);
enum XMM: int;
  XMM opcodes that conform to the following:
  opcode xmm1,xmm2/mem
  and do not have side effects (i.e. do not write to memory).
pure nothrow @nogc @safe void16 __simd(XMM opcode, void16 op1, void16 op2);
  Generate two operand instruction with XMM 128 bit operands.
  This is a compiler magic function - it doesn't behave like regular D functions.
  Parameters:
  opcode any of the XMM opcodes; it must be a compile time constant op1 first operand op2 second operand
  Returns:
  result of opcode
pure nothrow @nogc @safe void16 __simd(XMM opcode, void16 op1);
  Unary SIMD instructions.
pure nothrow @nogc @safe void16 __simd(XMM opcode, double d);
pure nothrow @nogc @safe void16 __simd(XMM opcode, float f);
pure nothrow @nogc @safe void16 __simd(XMM opcode, void16 op1, void16 op2, ubyte imm8);
  For instructions: CMPPD, CMPSS, CMPSD, CMPPS, PSHUFD, PSHUFHW, PSHUFLW, BLENDPD, BLENDPS, DPPD, DPPS, MPSADBW, PBLENDW, ROUNDPD, ROUNDPS, ROUNDSD, ROUNDSS
  Parameters:
  opcode any of the above XMM opcodes; it must be a compile time constant op1 first operand op2 second operand imm8 third operand; must be a compile time constant
  Returns:
  result of opcode
pure nothrow @nogc @safe void16 __simd_ib(XMM opcode, void16 op1, ubyte imm8);
  For instructions with the imm8 version: PSLLD, PSLLQ, PSLLW, PSRAD, PSRAW, PSRLD, PSRLQ, PSRLW, PSRLDQ, PSLLDQ
  Parameters:
  opcode any of the XMM opcodes; it must be a compile time constant op1 first operand imm8 second operand; must be a compile time constant
  Returns:
  result of opcode
pure nothrow @nogc @safe void16 __simd_sto(XMM opcode, void16 op1, void16 op2);
  For "store" operations of the form: op1 op= op2
  Returns:
  op2 These cannot be marked as pure, as semantic() doesn't check them.
pure nothrow @nogc @safe void16 __simd_sto(XMM opcode, double op1, void16 op2);
pure nothrow @nogc @safe void16 __simd_sto(XMM opcode, float op1, void16 op2);

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